Filter circuit

フィルター回路

Abstract

【課題】入力信号の周波数が高くなるほど出力信号の入力信号に対する相対的な位相が進行し、入力信号の周波数が低くなるほど出力信号の入力信号に対する相対的な位相差がなくなる周波数領域を使用するフィルター回路を得る。 【解決手段】抵抗とコンデンサによって構成されるフィルター回路において、入力端子Iと接地端子Gの間に第1の抵抗R1と第2の抵抗R2とコンデンサCがこの順番で直列に接続され、第1の抵抗R1と第2の抵抗R2の接続点に出力端子Oが設けられており、第1の抵抗R1と第2の抵抗R2の合成抵抗値とコンデンサCの静電容量値によって決定されるカットオフ周波数より高い周波数領域にある最大位相遅延周波数より高い周波数領域を使用することにより、入力信号の周波数が高くなるにつれて、出力信号の入力信号に対する相対的な位相の遅れが小さくなる特性を発揮するフィルター回路による。 【選択図】図1
PROBLEM TO BE SOLVED: To obtain the filter circuit which uses such a frequency domain that the relative phase of an output signal to an input signal advances as the frequency of the input signal increases, and the relative phase difference of an output signal to an input signal disappears as the frequency of the input signal decreases. SOLUTION: In the filter circuit including resistors and a capacitor, a first resistor R1, a second resistor R2 and a capacitor C are connected in series in this order between an input terminal I and a ground terminal G, an output terminal O is provided at the joint of the first resistor R1 and second resistor R2, and such characteristics that the relative phase lag of the output signal to the input signal decreases as the frequency of the input signal increases are exhibited by using a frequency domain which is higher than the maximum phase lag frequency in a frequency domain which is higher than a cut-off frequency determined by a combined resistance value of the first resistor R1 and second resistor R2, and the capacitance value of the capacitor C. COPYRIGHT: (C)2010,JPO&INPIT

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